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lt4356mp-1/LT4356MP-2 1 4356mp12fb applications features description surge stopper the lt ? 4356 surge stopper protects loads from high voltage transients. it regulates the output during an overvoltage event, such as load dump in automobiles, by controlling the gate of an external n-channel mosfet. the output is limited to a safe value thereby allowing the loads to continue functioning. the lt4356mp also monitors the voltage drop between the v cc and sns pins to protect against overcurrent faults. an internal ampli? er limits the current sense voltage to 50mv. in either fault condition, a timer is started inversely proportional to mosfet stress. if the timer expires, the flt pin pulls low to warn of an impending power-down. if the condition persists, the mosfet is turned off. after a cooldown period, the gate pin pulls up turning on the mosfet again. the auxiliary ampli? er may be used as a voltage detection comparator or as a linear regulator controller driving an external pnp pass transistor. back-to-back fets can be used in lieu of a schottky diode for reverse input protection, reducing voltage drop and power loss. a shutdown pin reduces the quiescent current to less than 7a for the lt4356-1 during shutdown. the lt4356-2 differs from the lt4356-1 during shutdown by reducing the quiescent current to 60a and keeping alive the auxiliary ampli? er for uses such as an undervoltage lockout or always-on regulator. n automotive/avionic surge protection n hot swap/live insertion n high side switch for battery powered systems n intrinsic safety applications n stops high voltage surges n adjustable output clamp voltage n overcurrent protection n wide operation range: 4v to 80v n reverse input protection to C60v n low 7a shutdown current, lt4356-1 n adjustable fault timer n controls n-channel mosfet n shutdown pin withstands C60v to 100v n fault output indication n guaranteed operation C55c to 125c n auxiliary ampli? er for level detection comparator or linear regulator controller n available in 10-pin msop or 16-pin so packages 4a, 12v overvoltage output regulator overvoltage protector regulates output at 27v during transient 0.1f 10 10m irlr2908 v in 12v 4356mp12 ta01 lt4356s gnd tmr out gate sns in + shdn a out fault v out en flt undervoltage fb v cc dc-dc converter gnd shdn v cc 4.99k 383k 100k 102k 100ms/div 4356mp12 ta01b v in 20v/div v out 20v/div 80v input surge c tmr = 6.8f i load = 500ma 27v adjustable clamp 12v 12v typical application l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. hot swap, no r sense and thinsot are trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
lt4356mp-1/LT4356MP-2 2 4356mp12fb v cc , shdn ................................................ C60v to 100v sns ............................. v cc C 30v or C60v to v cc + 0.3v out, a out , flt , en ..................................... C0.3v to 80v gate (note 3) .................................C0.3v to v out + 10v fb, tmr, in + ................................................ C0.3v to 6v a out , en, flt, in + ..................................................C3ma 1 2 3 4 5 fb out gate sns v cc 10 9 8 7 6 tmr gnd en flt shd n top view ms package 10-lead plastic msop t jmax = 125c, ja = 160c/w top view s package 16-lead plastic so 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 tmr fb nc out gate nc sns v cc in + nc a out nc gnd en flt shd n t jmax = 150c, ja = 100c/w operating temperature range lt4356m ............................................ C55c to 125c storage temperature range ms, so .............................................. C65c to 150c lead temperature (soldering, 10 sec) ms, so ............................................................. 300c absolute maximum ratings lead free finish tape and reel part marking package description temperature range lt4356mpms-1#pbf lt4356mpms-1#trpbf ltfgd 10-lead plastic msop C55c to 125c lt4356mps-1#pbf lt4356mps-1#trpbf lt4356mps-1 16-lead plastic so C55c to 125c lt4356mps-2#pbf lt4356mps-2#trpbf lt4356mps-2 16-lead plastic so C55c to 125c lead based finish tape and reel part marking package description temperature range lt4356mpms-1 lt4356mpms-1#tr ltfgd 10-lead plastic msop C55c to 125c lt4356mps-1 lt4356mps-1#tr lt4356mps-1 16-lead plastic so C55c to 125c lt4356mps-2 lt4356mps-2#tr lt4356mps-2 16-lead plastic so C55c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ pin configuration (notes 1 and 2) order information
lt4356mp-1/LT4356MP-2 3 4356mp12fb the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 12v unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units v cc operating voltage range l 48 0v i cc v cc supply current v shdn = float l 1 1.5 ma v shdn = 0v, in + = 1.3v, lt4356mp-1 lt4356mp-1 l 7 7 25 40 a a v shdn = 0v, in + = 1.3v, LT4356MP-2 LT4356MP-2 l 60 60 70 250 a a i r reverse input current v sns = v cc = C30v, shdn open v sns = v cc = v shdn = C30v l l 0.3 0.8 1 2 ma ma v gate gate pin output high voltage v cc = 4v; (v gate C v out ) 80v v cc 8v; (v gate C v out ) l l 4.5 10 8 16 v v i gate(up) gate pin pull-up current v gate = 12v; v cc = 12v v gate = 48v; v cc = 48v l l C4 C4.5 C23 C30 C38 C50 a a i gate(dn) gate pin pull-down current overvoltage, v fb = 1.4v, v gate = 12v overcurrent, v cc C v sns = 120mv, v gate = 12v shutdown mode, v shdn = 0v, v gate = 12v l l l 75 5 1.5 150 10 5 ma ma ma v fb fb pin servo voltage v gate = 12v; v out = 12v l 1.215 1.25 1.275 v i fb fb pin input current v fb = 1.25v l 0.3 1 a v sns overcurrent fault threshold v sns = (v cc C v sns ), v cc = 12v v sns = (v cc C v sns ), v cc = 48v l l 42.5 43 50 51 55 56 mv mv i sns sns pin input current v sns = v cc = 12v to 48v l 51022 a i leak flt , en pins leakage current a out pin leakage current flt , en = 80v a out = 80v l 2.5 4.5 a a i tmr tmr pin pull-up current v tmr = 1v, v fb = 1.5v, (v cc C v out ) = 0.5v v tmr = 1v, v fb = 1.5v, (v cc C v out ) = 75v v tmr = 1.3v, v fb = 1.5v v tmr = 1v, v sns = 60mv, (v cc C v out ) = 0.5v v tmr = 1v, v sns = 60mv, (v cc C v out ) = 80v l l l l l C1.5 C44 C3.5 C2.5 C195 C2.5 C50 C5.5 C4.5 C260 C4 C56 C8.5 C6.5 C315 a a a a a tmr pin pull-down current v tmr = 1v, v fb = 1v, v sns = 0v l 1.5 2.2 2.7 a v tmr tmr pin thresholds flt from high to low, v cc = 5v to 80v v gate from low to high, v cc = 5v to 80v l l 1.22 0.48 1.25 0.5 1.28 0.52 v v v tmr early warning period from flt going low to gate going low, v cc = 5v to 80v l 80 100 120 mv v in + in + pin threshold l 1.22 1.25 1.28 v i in + in + pin input current v in + = 1.25v l 0.3 1 a v ol flt , en pins output low i sink = 2ma i sink = 0.1ma l l 2 300 8 800 v mv a out pin output low i sink = 2ma i sink = 0.1ma l l 2 200 8 400 v mv
lt4356mp-1/LT4356MP-2 4 4356mp12fb i cc (shutdown) vs v cc i cc vs v cc v cc (v) 0 0 i cc (a) 20 40 20 40 60 80 4356mp12 g03 120 lt4356-2 in + = 1.3v 60 80 100 10 30 50 70 v cc (v) 0 0 i cc (a) 200 400 600 20 40 60 80 4356mp12 g01 800 1000 10 30 50 70 i cc (shutdown) vs v cc v cc (v) 0 0 i cc (a) 10 20 30 40 20 40 60 80 4356mp12 g02 50 60 10 30 50 70 lt4356-1 note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: all currents into device pins are positive; all currents out of device pins are negative. all voltages are referenced to gnd unless otherwise speci? ed. note 3: an internal clamp limits the gate pin to a minimum of 10v above the out pin. driving this pin to voltages beyond the clamp may damage the device. electrical characteristics typical performance characteristics speci? cations are at v cc = 12v, t a = 25c unless otherwise noted. the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 12v unless otherwise noted. symbol parameter conditions min typ max units i out out pin input current v out = v cc = 12v v out = v cc = 12v, v shdn = 0v l l 200 6 300 14 a ma v out out pin high threshold v out = v cc C v out ; en from low to high l 0.25 0.5 0.7 v v shdn shdn pin threshold v cc = 12v to 48v l 0.6 0.4 1.4 1.7 2.1 v v v shdn (flt) shdn pin float voltage v cc = 12v to 48v l 0.6 1.2 2.1 v i shdn shdn pin current v shdn = 0v l C1 C4 C8 a t off(oc ) overcurrent turn-off delay time gate from high to low, v sns = 0 120mv l 24 s t off(ov) overvoltage turn-off delay time gate from high to low, v fb = 0 1.5v l 0.25 1 s
lt4356mp-1/LT4356MP-2 5 4356mp12fb typical performance characteristics speci? cations are at v cc = 12v, t a = 25c unless otherwise noted. temperature (c) C50 0 i cc (a) 50 100 150 200 0 50 100 125 4356mp12 g05 250 300 C25 25 75 lt4356-2 i cc (shutdown) vs temperature i cc (shutdown) vs temperature temperature (c) C50 0 i cc (a) 5 10 15 20 0 50 100 125 4356mp12 g04 25 35 30 C25 25 75 lt4356-1 shdn current vs temperature gate pull-up current vs v cc gate pull-up current vs temperature temperature (c) C50 0 i shdn (a) 1 2 3 0 50 100 125 4356mp12 g06 4 6 5 C25 25 75 v shdn = 0v v cc (v) 0 0 i gate (a) 10 20 30 5 15 25 35 20 40 60 80 4356mp12 g07 40 10 30 50 70 temperature (c) C50 0 i gate (a) 5 10 15 20 0 50 100 125 4356mp12 g08 25 35 30 C25 25 75 v gate = v out = 12v gate pull-down current vs temperature temperature (c) C50 100 i gate(down) (ma) 120 140 160 0 50 100 125 4356mp12 g09 180 220 200 C25 25 75 overvoltage condition v fb = 1.5v gate pull-down current vs temperature v gate vs i gate temperature (c) C50 0 i gate(down) (ma) 2 4 6 0 50 100 125 4356mp12 g10 8 12 10 C25 25 75 overcurrent condition v sns = 120mv i gate (a) 0 0 v gate (v) 4 2 6 8 10 4 8 12 16 4356mp12 g11 12 14 2 6 10 14 v out = 12v v gate vs temperature temperature (c) C50 0 50 100 125 C25 25 75 0 v gate (v) 4 2 6 8 10 4356mp12 g12 12 14 i gate = C1a v cc = 8v v cc = 4v
lt4356mp-1/LT4356MP-2 6 4356mp12fb typical performance characteristics warning period tmr current vs v cc tmr pull-down current vs temperature output low voltage vs current v cc (v) 0 20406080 4356mp12 g16 10 30 50 70 0 i tmr (a) 4 2 6 8 10 12 14 overvoltage, early warning period v fb = 1.5v v tmr = 1.3v temperature (c) C50 0 i tmr (a) 0 50 100 125 4356mp12 g17 3.0 2.5 2.0 1.5 1.0 0.5 C25 25 75 v tmr = 1v current (ma) 0 0 v ol (v) 1.0 2.0 3.0 0.5 1.5 2.5 3.5 2.0 3.0 4356mp12 g18 4.0 1.00.5 2.5 1.5 a out en flt overvoltage turn-off time vs temperature overcurrent turn-off time vs temperature temperature (c) C50 0 100 t off (ns) 0 50 100 125 4356mp12 g19 500 400 300 200 C25 25 75 overvoltage condition v fb = 1.5v temperature (c) C50 1.0 1.5 t off (s) 0 50 100 125 4356mp12 g20 4.0 3.5 3.0 2.5 2.0 C25 25 75 overcurrent condition v sns = 120mv v cc (v) 0 i cc (ma) C10 C15 C80 4356mp12 g21 C5 0 C20 C40 C60 C20 v cc = sns reverse current vs reverse voltage overcurrent tmr current vs (v cc C v out ) v cc C v out (v) 0 0 i tmr (a) 40 80 120 160 20 40 60 80 4356mp12 g15 200 280 240 10 30 50 70 overcurrent condition v out = 0v v tmr = 1v v gate vs v cc overvoltage tmr current vs (v cc C v out ) v cc (v) 0 20406080 4356mp12 g13 10 30 50 70 0 v gate (v) 4 2 6 8 10 12 16 14 i gate = C1a v out = v cc t a = C45c t a = 25c t a = 130c v cc C v out (v) 0 0 i tmr (a) 8 16 24 32 20 40 60 80 4356mp12 g14 40 48 10 30 50 70 overvoltage condition v out = 5v v tmr = 1v
lt4356mp-1/LT4356MP-2 7 4356mp12fb pin functions a out (so package only): ampli? er output. open collector output of the auxiliary ampli? er. it is capable of sinking up to 2ma from 80v. the negative input of the ampli? er is internally connected to a 1.25v reference. en: open-collector enable output. the en pin goes high impedance when the voltage at the out pin is above (v cc C 0.7v), indicating the external mosfet is fully on. the state of the pin is latched until the out pin voltage resets at below 0.5v and goes back up above 2v. the internal npn is capable of sinking up to 3ma of current from 80v to drive an led or opto-coupler. fb: voltage regulator feedback input. connect this pin to the center tap of the output resistive divider connected between the out pin and ground. during an overvoltage condition, the gate pin is servoed to maintain a 1.25v threshold at the fb pin. this pin is clamped internally to 7v. tie to gnd to disable the ov clamp. flt : open-collector fault output. this pin pulls low after the voltage at the tmr pin has reached the fault threshold of 1.25v. it indicates the pass transistor is about to turn off because either the supply voltage has stayed at an elevated level for an extended period of time (voltage fault) or the device is in an overcurrent condition (current fault). the internal npn is capable of sinking up to 3ma of current from 80v to drive an led or opto-coupler. gate: n-channel mosfet gate drive output. the gate pin is pulled up by an internal charge pump current source and clamped to 14v above the out pin. both voltage and cur- rent ampli? ers control the gate pin to regulate the output voltage and limit the current through the mosfet. gnd: device ground. in + (so package only): positive input of the auxiliary ampli? er. this ampli? er can be used as a level detection comparator with external hysteresis or linear regulator controlling an external pnp transistor. this pin is clamped internally to 7v. connect to ground if unused. out: output voltage sense input. this pin senses the voltage at the source of the n-channel mosfet and sets the fault timer current. when the out pin voltage reaches 0.7v away from v cc , the en pin goes high impedance. shdn: shutdown control input. the lt4356 can be shut down to a low current mode by pulling the shdn pin below 0.4v. pull this pin above 2.1v or disconnect it and allow the internal current source to turn the part back on. the leakage current to ground at the pin should be limited to no more than 1a if no pull-up device is used to turn the part on. the shdn pin can be pulled up to 100v or below gnd by 60v without damage. in shutdown, the auxiliary ampli? er turns off in the lt4356-1 but continues operating in the lt4356-2. sns: current sense input. connect this pin to the output of the current sense resistor. the current limit circuit controls the gate pin to limit the sense voltage between v cc and sns pins to 50mv. at the same time the sense ampli? er also starts a current source to charge up the tmr pin. this pin can be pulled below gnd by up to 60v, though the voltage difference with the v cc pin must be limited to less than 30v. connect to v cc if unused. tmr: fault timer input. connect a capacitor between this pin and ground to set the times for early warning, fault and cooldown periods. the current charging up this pin during fault conditions depends on the voltage difference between the v cc and out pins. when v tmr reaches 1.25v, the flt pin pulls low to indicate the detection of a fault condition. if the condition persists, the pass transistor turns off when v tmr reaches the threshold of 1.35v. as soon as the fault condition disappears, the pull-up current stops and a 2a current starts to pull the tmr pin down. when v tmr reaches the retry threshold of 0.5v, the gate pin pulls high turning back on the pass transistor. v cc : positive supply voltage input. the positive supply input ranges from 4v to 80v for normal operation. it can also be pulled below ground potential by up to 60v during a reverse battery condition, without damaging the part. the supply current is reduced to 7a with all the functional blocks off.
lt4356mp-1/LT4356MP-2 8 4356mp12fb C + + C + C + C v cc shdn in + auxiliary amplifier ia 1.25v 50mv 2a 1.35v 1.25v C + 1.25v 0.5v sns tmr gnd gate 14v a out out 4356mp12 bd v cc i tmr flt en fb + C charge pump control logic gateoff flt out ov oc va shdn restart + C block diagram
lt4356mp-1/LT4356MP-2 9 4356mp12fb some power systems must cope with high voltage surges of short duration such as those in automobiles. load circuitry must be protected from these transients, yet high availability systems must continue operating during these events. the lt4356 is an overvoltage protection regulator that drives an external n-channel mosfet as the pass transis- tor. it operates from a wide supply voltage range of 4v to 80v. it can also be pulled below ground potential by up to 60v without damage. the low power supply require- ment of 4v allows it to operate even during cold cranking conditions in automotive applications. the internal charge pump turns on the n-channel mosfet to supply current to the loads with very little power loss. two mosfets can be connected back to back to replace an inline schottky diode for reverse input protection. this improves the ef- ? ciency and increases the available supply voltage level to the load circuitry during cold crank. normally, the pass transistor is fully on, powering the loads with very little voltage drop. when the supply volt- age surges too high, the voltage ampli? er (va) controls the gate of the mosfet and regulates the voltage at the source pin to a level that is set by the external resistive divider from the out pin to ground and the internal 1.25v reference. a current source starts charging up the capaci- tor connected at the tmr pin to ground. if the voltage at the tmr pin, v tmr , reaches 1.25v, the flt pin pulls low to indicate impending turn-off due to the overvoltage condition. the pass transistor stays on until the tmr pin reaches 1.35v, at which point the gate pin pulls low turning off the mosfet. the potential at the tmr pin starts decreasing as soon as the overvoltage condition disappears. when the voltage at the tmr pin reaches 0.5v the gate pin begins rising, turning on the mosfet. the flt pin will then go to a high impedance state. the fault timer allows the load to continue functioning during short transient events while protecting the mosfet from being damaged by a long period of supply overvolt- age, such as a load dump in automobiles. the timer period varies with the voltage across the mosfet. a higher voltage corresponds to a shorter fault timer period, ensuring the mosfet operates within its safe operating area (soa). the lt4356 senses an overcurrent condition by monitor- ing the voltage across an optional sense resistor placed between the v cc and sns pins. an active current limit circuit (ia) controls the gate pin to limit the sense volt- age to 50mv. a current is also generated to start charging up the tmr pin. this current is about 5 times the current generated during an overvoltage event. the flt pin pulls low when the voltage at the tmr pin reaches 1.25v and the mosfet is turned off when it reaches 1.35v. an auxiliary ampli? er is provided with the negative input connected to an internal 1.25v reference. the output pull- down device is capable of sinking up to 2ma of current allowing it to drive an led or opto coupler. this ampli? er can be con? gured as a linear regulator controller driving an external pnp transistor or a comparator function to monitor voltages. a shutdown pin turns off the pass transistor and reduces the supply current to less than 7a for the lt4356-1. the supply current drops down to 60a while keeping the internal reference and the auxiliary ampli? er active for the lt4356-2 version during shutdown. operation
lt4356mp-1/LT4356MP-2 10 4356mp12fb the lt4356 can limit the voltage and current to the load circuitry during supply transients or overcurrent events. the total fault timer period should be set to ride through short overvoltage transients while not causing damage to the pass transistor. the selection of this n-channel mosfet pass transistor is critical for this application. it must stay on and provide a low impedance path from the input supply to the load during normal operation and then dissipate power during overvoltage or overcurrent conditions. the following sections describe the overcurrent and the overvoltage faults, and the selection of the timer capacitor value based on the required warning time. the selection of the n-channel mosfet pass transistor is discussed next. auxiliary ampli? er, reverse input, and the shutdown functions are covered after the mosfet selection. external component selection is discussed in detail in the design example section. overvoltage fault the lt4356 limits the voltage at the out pin during an overvoltage situation. an internal voltage ampli? er regu- lates the gate pin voltage to maintain a 1.25v threshold at the fb pin. during this period of time, the power mosfet is still on and continues to supply current to the load. this allows uninterrupted operation during short overvoltage transient events. when the voltage regulation loop is engaged for longer than the time-out period, set by the timer capacitor con- nected from the tmr pin to ground, an overvoltage fault is detected. the gate pin is pulled down to the out pin by a 150ma current. after the fault condition has disappeared and a cooldown period has transpired, the gate pin starts to pull high again. this prevents the power mosfet from being damaged during a long period of overvoltage, such as during load dump in automobiles. overcurrent fault the lt4356 features an adjustable current limit that protects against short circuits or excessive load current. during an overcurrent event, the gate pin is regulated to limit the current sense voltage across the v cc and sns pins to 50mv. an overcurrent fault occurs when the current limit circuitry has been engaged for longer than the time-out delay set by the timer capacitor. the gate pin is then immediately pulled low by a 10ma current to gnd turning off the mosfet. after the fault condition has disappeared and a cooldown period has transpired, the gate pin is allowed to pull back up and turn on the pass transistor. fault timer the lt4356 includes an adjustable fault timer pin. con- necting a capacitor from the tmr pin to ground sets the delay timer period before the mosfet is turned off. the same capacitor also sets the cooldown period before the mosfet is allowed to turn back on after the fault condi- tion has disappeared. once a fault condition, either overvoltage or overcurrent, is detected, a current source charges up the tmr pin. the current level varies depending on the voltage drop across the drain and source terminals of the power mosfet(v ds ), which is typically from the v cc pin to the out pin. this scheme takes better advantage of the available safe operating area (soa) of the mosfet than would a ? xed timer current. the timer function operates down to v cc = 5v across the whole temperature range. applications information
lt4356mp-1/LT4356MP-2 11 4356mp12fb fault timer current the timer current starts at around 2a with 0.5v or less of v ds , increasing linearly to 50a with 75v of v ds dur- ing an overvoltage fault (figure 1). during an overcurrent fault, it starts at 4a with 0.5v or less of v ds but increases to 260a with 80v across the mosfet (figure 2). this arrangement allows the pass transistor to turn off faster during an overcurrent event, since more power is dissipated during this condition. refer to the typical performance characteristics section for the timer current at different v ds in both overvoltage and overcurrent events. when the voltage at the tmr pin, v tmr , reaches the 1.25v threshold, the flt pin pulls low to indicate the detection of a fault condition and provide warning to the load of the impending power loss. in the case of an overvoltage fault, the timer current then switches to a ? xed 5a. the interval between flt asserting low and the mosfet turn- ing off is given by: t warning = c tmr ? 100mv 5a applications information figure 1. overvoltage fault timer current figure 2. overcurrent fault timer current t flt = 15ms/f total fault timer = t flt + t warning t warning = 20ms/f t flt = 93.75ms/f t warning = 20ms/f v tmr(v) i tmr = 5a i tmr = 5a v ds = 75v (i tmr = 50a) v ds = 10v (i tmr = 8a) 1.35 1.25 time 4356mp12 f01 0.50 t flt = 2.88ms/f total fault timer = t flt + t warning t flt = 21.43ms/f t warning = 2.86ms/f t warning = 0.38ms/f v tmr(v) v ds = 10v (i tmr = 35a) 1.35 1.25 0.50 time 4356mp12 f02 v ds = 80v (i tmr = 260a)
lt4356mp-1/LT4356MP-2 12 4356mp12fb voltage n-channel mosfets. for systems with v cc less than 8v, a logic level mosfet is required since the gate drive can be as low as 4.5v. the soa of the mosfet must encompass all fault condi- tions. in normal operation the pass transistor is fully on, dissipating very little power. but during either overvoltage or overcurrent faults, the gate pin is servoed to regu- late either the output voltage or the current through the mosfet. large current and high voltage drop across the mosfet can coexist in these cases. the soa curves of the mosfet must be considered carefully along with the selection of the fault timer capacitor. transient stress in the mosfet during an overvoltage event, the lt4356 drives a series pass mosfet to regulate the output voltage at an acceptable level. the load circuitry may continue operating throughout this interval, but only at the expense of dissipation in the mosfet pass device. mosfet dissipation or stress is a function of the input voltage waveform, regulation voltage and load current. the mosfet must be sized to survive this stress. most transient event speci? cations use the model shown in figure 3. the idealized waveform comprises a linear ramp of rise time t r , reaching a peak voltage of v pk and exponentially decaying back to v in with a time constant of t. a common automotive transient speci? cation has constants of t r = 10s, v pk = 80v and = 1ms. a surge condition known as load dump has constants of t r = 5ms, v pk = 60v and = 200ms. this ? xed early warning period allows the systems to per- form necessary backup or house-keeping functions before the power supply is cut off. after v tmr crosses the 1.35v threshold, the pass transistor turns off immediately. note that during an overcurrent event, the timer current is not reduced to 5a after v tmr has reached 1.25v threshold, since it would lengthen the overall fault timer period and cause more stress on the power mosfet. as soon as the fault condition has disappeared, a 2a current starts to discharge the timer capacitor to ground. when v tmr reaches the 0.5v threshold, the internal charge pump starts to pull the gate pin high, turning on the mosfet. the tmr pin is then actively regulated to 0.5v until the next fault condition appears. the total cooldown timer period is given by: t cool = c tmr ? 0.85v 2a mosfet selection the lt4356 drives an n-channel mosfet to conduct the load current. the important features of the mosfet are on-resistance r ds(on) , the maximum drain-source voltage v (br)dss , the threshold voltage, and the soa. the maximum allowable drain-source voltage must be higher than the supply voltage. if the output is shorted to ground or during an overvoltage event, the full supply voltage will appear across the mosfet. the gate drive for the mosfet is guaranteed to be more than 10v and less than 16v for those applications with v cc higher than 8v. this allows the use of standard threshold applications information figure 3. prototypical transient waveform v pk t v in 4356mp12 f03 t r
lt4356mp-1/LT4356MP-2 13 4356mp12fb applications information mosfet stress is the result of power dissipated within the device. for long duration surges of 100ms or more, stress is increasingly dominated by heat transfer; this is a matter of device packaging and mounting, and heatsink thermal mass. this is analyzed by simulation, using the mosfet thermal model. for short duration transients of less than 100ms, mosfet survival is increasingly a matter of safe operating area (soa), an intrinsic property of the mosfet. soa quanti- ? es the time required at any given condition of v ds and i d to raise the junction temperature of the mosfet to its rated maximum. mosfet soa is expressed in units of watt-squared-seconds (p 2 t). this ? gure is essentially con- stant for intervals of less than 100ms for any given device type, and rises to in? nity under dc operating conditions. destruction mechanisms other than bulk die temperature distort the lines of an accurately drawn soa graph so that p 2 t is not the same for all combinations of i d and v ds . in particular p 2 t tends to degrade as v ds approaches the maximum rating, rendering some devices useless for absorbing energy above a certain voltage. calculating transient stress to select a mosfet suitable for any given application, the soa stress must be calculated for each input transient which shall not interrupt operation. it is then a simple matter to chose a device which has adequate soa to survive the maximum calculated stress. p 2 t for a prototypical transient waveform is calculated as follows (figure 4). let a = v reg C v in b = v pk C v in (v in = nominal input voltage) then p 2 t = i load 2 1 3 t r bCa () 3 b + 1 2 2a 2 ln b a + 3a 2 + b 2 ? 4ab ? ? ? ? ? ? ? ? ? ? ? ? ? ? typically v reg v in and >> t r simplifying the above to p 2 t = 1 2 i load 2 v pk Cv reg () 2 (w 2 s) for the transient conditions of v pk = 80v, v in = 12v, v reg = 16v, t r = 10s and = 1ms, and a load current of 3a, p 2 t is 18.4w 2 seasily handled by a mosfet in a d-pak pack- age. the p 2 t of other transient waveshapes is evaluated by integrating the square of mosfet power versus time. calculating short-circuit stress soa stress must also be calculated for short-circuit condi- tions. short-circuit p 2 t is given by: p 2 t = (v in ? v sns /r sns ) 2 ? t tmr (w 2 s) where, v sns is the sense pin threshold, and t tmr is the overcurrent timer interval. for v in = 14.7v, v sns = 50mv, r sns = 12m and c tmr = 100nf, p 2 t is 6.6w 2 sless than the transient soa calculated in the previous example. nevertheless, to account for circuit tolerances this ? gure should be doubled to 13.2w 2 s. limiting inrush current and gate pin compensation the lt4356 limits the inrush current to any load capacitance by controlling the gate pin voltage slew rate. an external capacitor can be connected from gate to ground to slow down the inrush current further at the expense of slower turn-off time. the gate capacitor is set at: c1 = i gate(up) i inrush ?c l figure 4. safe operating area required to survive prototypical transient waveform v pk t v in 4356mp12 f04 v reg t r
lt4356mp-1/LT4356MP-2 14 4356mp12fb figure 5 figure 6. auxiliary ldo output with optional current limit applications information the lt4356 does not need extra compensation compo- nents at the gate pin for stability during an overvoltage or overcurrent event. with transient input voltage step faster than 5v/s, a gate capacitor, c1, to ground is needed to prevent self enhancement of the n-channel mosfet. the extra gate capacitance slows down the turn-off time during fault conditions and may allow excessive current during an output short event. an extra resistor, r1, in series with the gate capacitor can improve the turn-off time. a diode, d1, should be placed across r1 with the cathode connected to c1 as shown in figure 5. auxiliary ampli? er an uncommitted ampli? er is included in the lt4356 to provide ? exibility in the system design. with the negative input connected internally to the 1.25v reference, the am- pli? er can be connected as a level detect comparator with external hysteresis. the open collector output pin, a out , is capable of driving an opto or led. it can also interface with the system via a pull-up resistor to a supply voltage up to 80v. another use is to implement undervoltage lockout, as shown in the typical application overvoltage regulator with undervoltage lockout. in shutdown, the auxiliary ampli? er turns off in the lt4356-1 but continues operating in the lt4356-2. c1 r3 4356mp f05 lt4356s gate q1 r1 d1 in4148w r lim *4.7 d1* bav99 2n2905a or bcp53 input 2.5v output 150ma max * optional for current limit lt4356s a out in + 11 12 r6 100k 4356 f06 r4 249k 47nf r5 249k 10f v out 1.25 r4 r5 r5 i lim z 0.7 r lim the ampli? er can also be con? gured as a low dropout linear regulator controller. with an external pnp transistor, such as 2n2905a, it can supply up to 100ma of current with only a few hundred mv of dropout voltage. current limit can be easily included by adding two diodes and one resistor (figure 6). reverse input protection a blocking diode is commonly employed when reverse input potential is possible, such as in automotive applica- tions. this diode causes extra power loss, generates heat, and reduces the available supply voltage range. during cold crank, the extra voltage drop across the diode is particularly undesirable. the lt4356 is designed to withstand reverse voltage without damage to itself or the load. the v cc , sns, and shdn pins can withstand up to 60v of dc voltage below the gnd potential. back-to-back mosfets must be used to eliminate the current path through their body diodes (figure 7). figure 8 shows the approach with a p-channel mosfet in place of q2.
lt4356mp-1/LT4356MP-2 15 4356mp12fb figure 7. overvoltage regulator with n-channel mosfet reverse input protection applications information shutdown the lt4356 can be shut down to a low current mode when the voltage at the shdn pin goes below the shutdown threshold of 0.6v. the quiescent current drops to 7a for the lt4356-1 and 60a for the lt4356-2 which leaves the auxiliary ampli? er on. the shdn pin can be pulled up to v cc or below gnd by up to 60v without damaging the pin. leaving the pin open allows an internal current source to pull it up and turn on the part while clamping the pin to 2.5v. the leakage current at the pin should be limited to no more than 1a if no pull-up device is used to help turn it on. supply transient protection the lt4356 is guaranteed to be safe from damage with supply voltages up to 100v. nevertheless, voltage tran- sients above 100v may cause permanent damage. during a short-circuit condition, the large change in current ? owing through power supply traces and associated wiring can cause inductive voltage transients which could exceed 100v. to minimize the voltage transients, the power trace parasitic inductance should be minimized by using wide traces. a small surge suppressor, d2, in figure 9, at the input will clamp the voltage spikes. figure 8. overvoltage regulator with p-channel mosfet reverse input protection figure 9. overvoltage regulator with low-battery detection c tmr 0.1f r sns 10m q1 irlr2908 q2 irlr2908 v in 12v v out 12v, 3a clamped at 16v 4356mp12 f07 lt4356s gnd tmr 12 1 out sns 4 7 shdn 9 a out 14 in + 16 v cc 8 en flt fb 11 10 2 d2* smaj58ca r2 4.99k r1 59k gate 5 r7 10k r5 1m q3 2n3904 d1 1n4148 r3 10 r4 10 *diodes inc. c tmr 47nf *sanyo 25ce22ga r3 10 r sns 10m q1 irlr2908 d2 smaj58a v in 4356mp12 f09 lt4356s gnd tmr out gatesns in + shdn a out fault en flt undervoltage fb c l * 22f dc-dc converter gnd shdn v cc r2 4.99k r4 383k r5 100k r1 59k 12 1 457 9 16 v cc 8 14 2 11 10 c tmr 0.1f r sns 10m q1 irlr2908 q2 si4435 v in 12v v out 12v, 3a clamped at 16v 4356mp12 f08 lt4356s gnd tmr 12 1 out sns 4 7 shdn 9 a out 14 in + 16 v cc 8 en flt fb 11 10 2 r2 4.99k r1 59k gate 5 r6 10k d1 1n5245 15v r3 10 d2* smaj58ca *diodes inc.
lt4356mp-1/LT4356MP-2 16 4356mp12fb a total bulk capacitance of at least 22f low esr electro- lytic is required close to the source pin of mosfet q1. in addition, the bulk capacitance should be at least 10 times larger than the total ceramic bypassing capacitor on the input of the dc/dc converter. layout considerations to achieve accurate current sensing, kelvin connection to the current sense resistor (r sns in figure 9) is recom- mended. the minimum trace width for 1oz copper foil is 0.02" per amp to ensure the trace stays at a reasonable temperature. 0.03" per amp or wider is recommended. note that 1oz copper exhibits a sheet resistance of about 530?/square. small resistances can cause large errors in high current applications. noise immunity will be improved signi? cantly by locating resistive dividers close to the pins with short v cc and gnd traces. design example as a design example, take an application with the follow- ing speci? cations: v cc = 8v to 14v dc with transient up to 80v, v out 16v, current limit (i lim ) at 5a, low battery detection at 6v, and 1ms of overvoltage early warning (figure 9). first, calculate the resistive divider value to limit v out to 16v during an overvoltage event: v reg = 1.25v ? r1 + r2 () r2 = 16v set the current through r1 and r2 during the overvoltage condition to 250a. r2 = 1.25v 250a = 5k choose 4.99k for r2. r1 = 16v C 1.25v () ? r2 1.25v = 58.88k the closest standard value for r1 is 59k. next calculate the sense resistor, r sns , value: r sns = 50mv i lim = 50mv 5a = 10m c tmr is then chosen for 1ms of early warning time: c tmr = 1ms ? 5a 100mv = 50nf the closest standard value for c tmr is 47nf. finally, calculate r4 and r5 for the 6v low battery threshold detection: 6v = 1.25v ? r4 + r5 () r5 choose 100k for r5. r4 = 6v C 1.25v () ? r5 1.25v = 380k select 383k for r4. the pass transistor, q1, should be chosen to withstand the output short condition with v cc = 14v. the total overcurrent fault time is: t oc = 47nf ? 0.85v 45.5a = 0.878ms the power dissipation on q1 equals to: p = 14v ? 50mv 10m = 70w these conditions are well within the safe operating area of irlr2908. applications information
lt4356mp-1/LT4356MP-2 17 4356mp12fb wide input range 5v to 28v hot swap with undervoltage lockout c tmr 1f r3 10 2 9 14 16 10 11 112 4578 r sns 20m q1 sud50n03-10 v in 4356mp12 ta02 lt4356s-1 gnd tmr out gate sns in + shdn a out v out en flt fb v cc r7 49.9k r6 118k 100f c1 47nf typical applications 24v overvoltage regulator withstands 150v at v in c tmr 0.1f q1 irf640 v in 24v v out clamped at 32v 4356mp12 ta03 lt4356s gnd tmr 12 1 out sns 4 7 shdn 9 flt 10 en 11 v cc 8 fb 2 d2* smat70a r2 4.99k r1 118k gate 5 r3 10 r9 1k 1w *diodes inc.
lt4356mp-1/LT4356MP-2 18 4356mp12fb typical applications overvoltage regulator with undervoltage lockout c tmr 0.1f r3 10 r sns 20m q1 irlr2908 v in 4356mp12 ta04 lt4356s-2 gnd tmr out gate sns in + shdn a out v out clamped at 16v en flt fb v cc r2 4.99k r7 100k r6 280k r4 1m r5 1m r1 59k d2* smaj58a *diodes inc. 875 12 1 4 2 9 14 16 10 11 overvoltage regulator with low battery detection and output keep alive during shutdown r3 10 r sns 10m v in 12v v out 12v, 4a clamped at 16v 4356mp12 ta05 lt4356s gnd tmr 12 1 out gate sns 4 5 7 in + 16 shdn 9 v cc v dd 8 en flt fb 11 a out lbo 14 10 2 d1 1n4746a 18v 1w r2 24.9k r6 47k r4 402k r5 105k r1 294k 1k 0.5w q1 irlr2908 q2 vn2222 c tmr 0.1f d2* smaj58a *diodes inc.
lt4356mp-1/LT4356MP-2 19 4356mp12fb typical applications 2.5a, 48v hot swap with overvoltage output regulation at 72v and uv shutdown at 35v d1 1n4714 bv = 33v c1 6.8nf c tmr 0.1f r3 10 r sns 15m v out 48v 2.5a 4356mp12 ta06 lt4356s gnd tmr 12 1 out gatesns v cc 4 578 shdn en flt 9 11 10 a out pwrgd fb in + 14 2 16 r7 1m c l 300f r5 4.02k r4 140k r6 100k r8 47k r2 4.02k r1 226k q1 fdb3632 d2* smat70a v in 48v *diodes inc. 2.5a, 28v hot swap with overvoltage output regulation at 36v and uv shutdown at 15v d1 1n4700 bv = 13v c1 6.8nf c tmr 0.1f r3 10 r sns 15m v out 28v 2.5a 4356mp12 ta07 lt4356s gnd tmr 12 1 out gatesns v cc 4 578 shdn en flt 9 11 10 a out pwrgd fb in + 14 2 16 r7 1m c l 300f r5 4.02k r4 113k r6 27k r8 47k r2 4.02k r1 110k q1 fdb3632 d2* smat70a *diodes inc. v in 28v
lt4356mp-1/LT4356MP-2 20 4356mp12fb typical applications overvoltage regulator with reverse input protection up to C80v c tmr 0.1f r sns 10m q1 irlr2908 q2 irlr2908 v in 12v v out 12v, 3a clamped at 16v 4356mp12 ta08 lt4356s gnd tmr 12 1 out sns v cc 4 7 shdn 9 a out 14 in + 16 8 en flt fb 11 10 2 d2* smaj58ca r2 4.99k r1 59k gate 5 r7 10k r5 1m q3 2n3904 d1 1n4148 r3 10 r4 10 * diodes inc. ** optional component for reduced standby current d3** in4148
lt4356mp-1/LT4356MP-2 21 4356mp12fb package description ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661) msop (ms) 0307 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C?0.27 (.007 C .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 C 6 typ detail a detail a gauge plane 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc 0.1016 0.0508 (.004 .002) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt4356mp-1/LT4356MP-2 22 4356mp12fb package description s package 16-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) .016 C .050 (0.406 C 1.270) .010 C .020 (0.254 C 0.508) s 45o 0o C 8o typ .008 C .010 (0.203 C 0.254) 1 n 2 3 4 5 6 7 8 n/2 .150 C .157 (3.810 C 3.988) note 3 16 15 14 13 .386 C .394 (9.804 C 10.008) note 3 .228 C .244 (5.791 C 6.197) 12 11 10 9 s16 0502 .053 C .069 (1.346 C 1.752) .014 C .019 (0.355 C 0.483) typ .004 C .010 (0.101 C 0.254) .050 (1.270) bsc .245 min n 1 2 3 n/2 .160 p.005 recommended solder pad layout .045 p.005 .050 bsc .030 p.005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
lt4356mp-1/LT4356MP-2 23 4356mp12fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 05/10 revised features and description added parameters to v ol in the electrical characteristics section rearranged typical performance characteristics revised pin functions section made minor text edits to the operation section replaced figure 6 and text edits in the applications information section 1 3 4 7 9 13-20 b 01/12 revised max value for i gate(up) current at v cc = 12v correct part number 3 10, 14 (revision history begins at rev a)
lt4356mp-1/LT4356MP-2 24 4356mp12fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0112 rev b ? printed in usa typical application part number description comments lt1641-1/lt1641-2 positive high voltage hot swap? controllers active current limiting, supplies from 9v to 80v ltc1696 overvoltage protection controller thinsot? package, 2.7v to 28v ltc1735 high ef? ciency synchronous step-down switching regulator output fault protection, 16-pin ssop ltc1778 no r sense ? wide input range synchronous step-down controller up to 97% ef? ciency, 4v v in 36v, 0.8v v out (0.9)(v in ), i out up to 20a ltc2909 triple/dual inputs uv/ov negative monitor pin selectable input polarity allows negative and ov monitoring ltc2912/ltc2913 single/dual uv/ov voltage monitor ads uv and ov trip values, 1.5% threshold accuracy ltc2914 quad uv/ov monitor for positive and negative supplies ltc3727/ltc3727-1 2-phase, dual, synchronous controller 4v v in 36v, 0.8v v out 14v ltc3827/ltc3827-1 low i q , dual, synchronous controller 4v v in 36v, 0.8v v out 10v, 80a quiescent current ltc3835/ltc3835-1 low i q , synchronous step-down controller single channel ltc3827/ltc3827-1 lt3845 low i q , synchronous step-down controller 4v v in 60v, 1.23v v out 36v, 120a quiescent current lt3850 dual, 550khz, 2-phase sychronous step-down controller dual 180 phased controllers, v in 4v to 24v, 97% duty cycle, 4mm 4mm qfn-28, ssop-28 packages lt4256 positive 48v hot swap controller with open-circuit detect foldback current limiting, open-circuit and overcurrent fault output, up to 80v supply ltc4260 positive high voltage hot swap controller with adc and i 2 c wide operating range 8.5v to 80v ltc4352 ideal mosfet oring diode external n-channel mosfets replace oring diodes, 0v to 18v operation ltc4354 negative voltage diode-or controller controls two n-channel mosfets, 1s turn-off, 80v operation ltc4355 positive voltage diode-or controller controls two n-channel mosfets, 0.5s turn-off, 80v operation hot swap, no r sense and thinsot are trademarks of linear technology corporation. overvoltage regulator with linear regulator up to 100ma c tmr 0.1f r3 10 r sns 10m q2 2n2905a v in 12v v out 12v, 3a clamped at 16v 2.5v, 100ma 4356mp12 ta09 lt4356s gnd tmr 12 1 out gate sns 4 5 7 a out 14 shdn 9 v cc 8 en flt fb 11 in + 16 10 2 c5 10f r2 4.99k r6 100k r1 59k r5 249k r4 249k c3 47nf q1 irlr2908 d2* smaj58a *diodes inc. related parts

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